1. Field
Exemplary embodiments of the present invention relate to a method for fabricating a semiconductor device, and more particularly, to a non-volatile memory device and a method for fabricating the same.
2. Description of the Related Art
A non-volatile memory device retains data stored therein although a power supply is cut off. Different types of non-volatile memory devices, such as flash memory, are being widely used.
FIG. 1 is a cross-sectional device illustrating a conventional non-volatile memory device.
Referring to FIG. 1, the conventional non-volatile memory device includes an isolation layer 12, a floating gate 15, a tunnel insulation layer 14, a dielectric layer 16, and a control gate 17. The isolation layer 12 is formed over a substrate 11 to define a plurality of active regions 13. The floating gate 15 is formed over each of the active regions 13 to have a surface higher than the isolation layer 12 with respect to the substrate 11. The tunnel insulation layer 14 is interposed between the floating gate 15 and the active regions 13. The dielectric layer 16 is formed along the surface of the substrate structure including the floating gate 15. The control gate 17 is formed over the dielectric layer 16.
In order to secure a proper coupling ratio, the dielectric layer 16 is formed along the surface of the floating gate 15 protruding from the isolation layer 12. As a result, the interference may be caused between adjacent cells 101 by a parasitic capacitance, particularly, the parasitic capacitance between the floating gate 15 and the dielectric layer 16 that are disposed adjacently to each other, and the characteristics of the non-volatile memory device may deteriorate. The characteristics of the non-volatile memory device may deteriorate more as the integration degree of a semiconductor device increases and the gap between the adjacent cells 101 becomes narrower.